The present invention relates generally to in-phase/quadrature (I/Q) generators, and more particularly to I/Q generators that exhibit amplitude and phase stability.
Prior art techniques for generating I/Q signals can be broadly classified into three groups. The first group consists of phase- and/or delay-locked-loops which lock a delay stage or oscillator to match a quarter-period of the input signal. These techniques are complicated, require time to lock after any change in conditions, and often require off-chip components to realize a long time-constant in the loop filter.
The second group of prior art I/Q generators consists of filters that have nominally 90xc2x0-relative phase shifts and nominally matched gains, but have first-order dependencies on input frequency and process. For example, an integrator or differentiator has a fixed 90xc2x0 phase shift, but the amplitude varies with changes in frequency. The performance of these filters is often unacceptable due to insufficient process control.
The third group of prior art I/Q generators consists of filters that have the first-order dependencies canceled. For example, the difference between the outputs of an integrator and a differentiator set to the same gain at the nominal frequency will have no first-order gain dependency. Thus, an increase in frequency will increase the amplitude of the differentiator but will decrease the (180xc2x0 out of phase) amplitude of the integrator, thereby leaving the overall output amplitude constant to the first order. The xe2x80x9cpoly-phasexe2x80x9d filter network is another example of a circuit in this group. These filters are of higher complexity than filters in the second group, and are often hard to implement cleanly at high frequencies due to the effects of parasitic capacitances.
A method for generating an in-phase (I) output signal and a quadrature-phase (Q) output signal from an input signal reduces phase error in the I/Q generator by delaying-and-doubling an input signal to produce a Q output signal and delaying the input signal twice and subtracting the same from the input signal to produce an I output signal, whereby the delaying-and-doubling and the twice-delaying-and-subtracting steps are performed such as to introduce substantially matched amplitude and phase error and whereby the phase error of the steps substantially cancels one another.
The I/Q generator includes a first 90xc2x0-phase delay circuit receiving an input signal and outputting an intermediate Q signal; a second 90xc2x0-phase delay circuit receiving the intermediate Q signal and producing an intermediate I signal; a signal doubler receiving the intermediate Q signal and producing a Q output signal of twice the amplitude of the input signal at a 90xc2x0 phase angle. Finally, the generator includes a signal differencer receiving the input signal and the intermediate I signal and producing an I output signal of substantially twice the amplitude of the input signal at a 0xc2x0 phase angle. The first and second delay circuits need only be substantially matched with one another to render the I/Q generator amplitude and phase stable over a broad range of manufacturing process, operating temperature and input signal frequency variation.